Stream Input for Asymmetric FIRs - 2023.2 English

Vitis Libraries

Release Date
2023-12-20
Version
2023.2 English

Stream input allows data samples to be written directly from the input stream to one of the Input Vector Registers without the requirement for a ping-pong window buffer. As a result, memory requirements and latency are reduced.

To maximize the throughput, FIRs can be configured with 2 input stream ports. Although this may not improve performance if the throughput is limited by other factors, i.e., the output stream bandwidth or the vector processor. Set TP_DUAL_IP to 1, to create a FIR instance with 2 input stream ports. In such a case the input data will be merged from the two ports in 128 bit chunks, onto one data stream internally, e.g.: