Overview - 2023.2 English

Vitis Libraries

Release Date
2023.2 English

dds_mixer operates in 3 modes:

Mixer Mode 0:

This is dds mode only. The library element has a single output window, which is written to with the sin/cos components corresponding to the programmed phase increment.

Mixer Mode 1:

This is dds plus mixer for a single data input port.

Each data input sample is complex multiplied with the corresponding dds sample, to create a modulated signal that is written to the output window.

Mixer Mode 2:

This is a special configuration for symmetrical carriers and two data input ports.

Each data sample of the first input is complex multiplied with the corresponding dds sample to create a modulated signal.

These are the templates to configure the dds_mixer class.



describes the type of individual data samples input to and output from the dds_mixer function. This is a typename and must be one of the following:

AIE1 : cint16, cint32, cfloat AIE2 : cint16, cint32


describes the mode of operation of the dds_mixer .

The values supported are:

0 (dds only mode),

1 (dds plus single data channel mixer),

2 (dds plus two data channel mixer for symmetrical carriers)


specifies the expected Spurious Free Dynamic Range that the useR expects from the generated

design. There are three distinct implementations available that offer a tradeoff between SFDR and performance.

The SFDR levels are at ~60dB, ~120dB, and ~180dB. The maximum theoretical SFDR is 96dB for cint16, 180dB for cint32 and 138dB for cfloat.


specifies if the input/output interface should be buffer-based or stream-based.

The values supported are 0 (buffer API) or 1 (stream API).


describes the number of samples in the input/output buffer API

or number of samples to process per iteration. DDS Mixer TP_INPUT_WINDOW_VSIZE must be a multiple of data output in each loop.

For AIE1, this has to be 64 for cint16, 16 for cint32, 4 for cfloat. For AIE2, this has to be 256 for cint16 and 64 for cint32.


specifies the super sample rate, ie how much data input/output in parallel for a single channel.

There will be a TP_SSR number of kernels, with a TP_SSR number of each port used on the interface.

A default value of 1 corresponds to the typical single kernel case.

template <
    typename TT_DATA,
    unsigned int TP_MIXER_MODE,
    unsigned int TP_SFDR = 90,
    unsigned int TP_API = IO_API::WINDOW,
    unsigned int TP_INPUT_WINDOW_VSIZE = 256,
    unsigned int TP_SSR = 1,
    unsigned int TP_RND = 0,
    unsigned int TP_SAT = 1
class dds_mixer_lut_graph: public graph

// typedefs

typedef std::array <port <direction>, TP_SSR> portArray

// fields

parameter ddsLut1
parameter ddsLut2
parameter ddsLut3
portArray <input> in1
portArray <input> in2
portArray <output> out
kernel m_ddsKernel[TP_SSR]
static constexpr unsigned int KINPUT_WINDOW_VSIZE