Snappy example resides in L2/demos/snappy directory.
Xilinx Snappy compression/decompression is FPGA based implementation of standard Snappy. Xilinx implementation of Snappy application is aimed at achieving high throughput for both compression and decompression. This Xilinx Snappy application is developed and tested on Xilinx Alveo U200. To know more about standard Snappy application please refer https://github.com/google/snappy
This application is accelerated using generic hardware architecture for LZ based data compression algorithms.