FRAME_ECCE4 - 2023.1 English

UltraScale Architecture Libraries Guide (UG974)

Document ID
UG974
Release Date
2023-05-17
Version
2023.1 English

Primitive: Configuration Frame Error Correction

  • PRIMITIVE_GROUP: CONFIGURATION
  • PRIMITIVE_SUBGROUP: ECC
  • Families: UltraScale+

Introduction

This design element enables the dedicated, built-in error correction code (ECC) for the configuration memory of the device. This element contains outputs that allow monitoring of the status of the ECC circuitry and the status of the readback CRC circuitry. This element is reserved for the exclusive use of Xilinx-generated SEM IP and is not supported for user applications.

Design Entry Method

Instantiation No
Inference No
IP and IP Integrator Catalog Recommended

Related Information

  • UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)