Step 3: Synthesizing the Design - Step 3: Synthesizing the Design - 2023.1 English - UG947

Vivado Design Suite Tutorial: Dynamic Function eXchange (UG947)
Document_ID
UG947
Release_Date
2023-05-24
Version
2023.1 English
The run_dfx.tcl script automates the synthesis phase of this tutorial. Five iterations of synthesis are called, one for the static top-level design and one for each of four Reconfigurable Modules.
  1. Open the AMD Vivado™ Tcl shell:
    • On Windows, select the Vivado desktop icon or select Start > All Programs > Xilinx Design Tools > Vivado 2023.1 > Vivado 2023.1 Tcl Shell.
    • On Linux, simply type, vivado -mode tcl.
  2. In the shell, navigate to \led_shift_count_us.
  3. If you are using a target demonstration board other than the KCU105, modify the xboard variable in run_dfx.tcl. Valid alternatives are the VCU108, KCU116 and VCU118 boards.
  4. Run the run_dfx.tcl script by entering:
    source run_dfx.tcl -notrace

    After all five passes through Vivado Synthesis have completed, the Vivado Tcl shell remains open. You can find log and report files for each module, alongside the final checkpoints, under each named folder in the Synth subdirectory.

    Tip: In \led_shift_count_us, multiple log files have been created:
    • run.log shows the summary as posted in the Tcl shell window
    • command.log echoes all the individual steps run by the script
    • critical.log reports all critical warnings produced during the run
    Note: The command.log file is itself a Tcl run script. This file can be modified if desired and sources as an input to reproduce the same results as an alternative to the more complex and parameterized Tcl_HD scripts.