Vivado Design Suite Tutorial: Programming and Debugging (UG936) - 2023.1 English - Describes debugging AMD FPGA designs using the Integrated Logic Analyzer (ILA) core in the AMD Vivado™ Design Suite and the Vivado logic analyzer to debug common problems in FPGA logic designs. Uses the Vivado logic analyzer in real-time and a KC705 Evaluation Board featuring a AMD Kintex™ 7 device. - UG936

Document ID

UG936

Release Date

2023-05-16

Version

2023.1 English