RQS_TIMING-201: Add an Output Register to RAM - 2023.1 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2023-05-16
Version
2023.1 English

Adding an output register to a RAM improves the clock to out time of the RAM read data path. This provides more flexibility to the place and route tools to place the RAM optimally as well as an option to place the register in the fabric instead of the RAM to optimize the critical path.

Output registers can be easily inferred by the synthesis tool. They must either have a synchronous reset or no reset.