Description - 2023.1 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2023-05-16
Version
2023.1 English

A bus skew constraint is set on a safely timed crossing that is either a synchronous clock-domain-crossing path or an intra-clock domain path. The set_bus_skew constraint should only be used on asynchronous paths. Although set_bus_skew is generally recommended to be used in conjunction with set_max_delay -datapath_only to control the relative placement between the source and destination registers, the constraint could also be used on a synchronous path when it is covered by a false path exception.