Setting a Bottom-Up, Out-of-Context Flow - 2023.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2023-06-09
Version
2023.1 English

You can set a bottom-up flow by selecting any HDL object to run as a separate out-of-context (OOC) flow. For an overview of the OOC flow, see Vivado Design Suite User Guide: Design Flows Overview (UG892).

The OOC flow behaves as follows:

  • Lower OOC modules run separately from the top level and have their own constraints.
  • OOC modules can be run as needed.
  • After you have run synthesis on an OOC module, it does not need to be rerun unless you change the RTL or constraints for that run.
  • When the top level is run, the lower level OOC runs are treated as black boxes.

If any IP is synthesized in OOC mode, the top-level synthesis run infers a black box for these IP. Hence, users cannot reference objects, such as pins, nets, and cells, internal to the IP as part of the top-level synthesis constraints. During implementation, the netlists from the IP DCPs are linked with the netlist produced when synthesizing the top-level design files, and the Vivado Design Suite resolves the IP black boxes. The IP XDC output products generated during implementation are applied along with any user constraints. If any constraints reference items inside the IP, there are warnings during synthesis about this, but they can be resolved during implementation.

This can result in a large runtime improvement for the top level because synthesis no longer needs to improve for the top level because synthesis no longer needs to be run on the full design.

To set up a module for an OOC run, find that module in the hierarchy view, and right-click the Set As Out-Of-Context for Synthesis option, shown in the following figure, and click OK.

Figure 1. Set as Out-of-Context Synthesis Dialog Box

The Set as Out-of-Context for Synthesis dialog box displays the following information and options:

Source Node
Module to which you apply the OOC.
New Fileset
Lists the New Fileset name, which you can edit.
Generate Stub
A checkbox that you can check to have the tool create a stub file.
Clock Constraint File
Choose to have the tool create a new XDC template for you, or you can use the drop-down menu to copy an existing XDC file to this Fileset. This XDC file should have clock definitions for all your clock pins on the OOC module.

The tool sets up the OOC to run automatically. As shown in the following figure, you can see it as a new run in the Design Runs window and as a block source in the Compile Order tab.

Figure 2. Compile Order Tab

When you set a flow to Out-of-Context, a new run is set up in the tool.

To run the option, right-click and select Launch Runs, described in Launching a Synthesis Run. This action sets the lower level as a top module and runs synthesis on that module without creating I/O buffers.

The run saves the netlist from synthesis and creates a stub file (if you selected that option) for later use. The stub file is the lower level with inputs and outputs and the black-box attribute set.

When you rerun the top-level module, the bottom-up synthesis inserts the stub file into the flow and compiles the lower level as a black box. The implementation run inserts the lower-level netlist, thus completing the design.

CAUTION:
Do not use the Bottom-Up OOC flow when there are AMD IP in OOC mode in the lower levels of the OOC module. Turn off the IP OOC mode to have AMD IP in an OOC module IP in an OOC module, and turn off the IP OOC mode. Do not use this flow when there are parameters on the OOC module or the ports of the OOC module are user-defined types. Those circumstances cause errors later in the flow.