SRL_STYLE - 2023.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2023-06-09
Version
2023.1 English

SRL_STYLE instructs the synthesis tool on how to infer SRLs found in the design. Accepted values are:

register
The tool does not infer an SRL but instead only uses registers.
srl
The tool infers an SRL without any registers before or after.
srl_reg
The tool infers an SRL and leaves one register after the SRL.
reg_srl
The tool infers an SRL and leaves one register before the SRL.
reg_srl_reg
The tool infers an SRL and leaves one register before and one after the SRL.
block
The tool infers the SRL inside a block RAM.

Place SRL_STYLE on the signal declared for SRL. This attribute can be set in RTL and XDC. The attribute can only be used on static SRLs. The indexing logic for dynamic SRLs is located within the SRL component itself. Therefore, the logic cannot be created around the SRL component to look up addresses outside of the component.

Note: Use care when using combinations of SRL_STYLE, SHREG_EXTRACT, and -shreg_min_size. The SHREG_EXTRACT attribute always takes precedence over the others. If SHREG_EXTRACT is set to "no" and SRL_STYLE is set to "srl", registers are used. The -shreg_min_size, being the global variable, always has the least amount of precedence. If an SRL of length 10 is set and SRL_STYLE is set to "srl", and -shreg_min_size is set to 20, the SRL is still inferred.
Note: In the following examples, the SRLs are all created with buses where the SRL shifts from one bit to the next. If the code to use SRL_STYLE has many differently named signals driving each other, place the SRL_STYLE attribute on the last signal in the chain. This includes if the last register in the chain is in a different hierarchy level than the other registers. The attribute always goes on the last register in the chain.