FSM Registers - 2023.1 English

Vivado Design Suite User Guide: Synthesis (UG901)
Document ID
UG901
Release Date
2023-06-09
Version
2023.1 English
  • Specify a reset or power-up state for Vivado synthesis to identify a Finite State Machine (FSM) or set the value of FSM_ENCODING to "none".
  • The State Register can be asynchronously or synchronously reset to a particular state.
Note: Use synchronous reset logic over asynchronous reset logic for an FSM.