Asynchronous Control Logic Modelization - 2023.1 English

Vivado Design Suite User Guide: Synthesis (UG901)
Document ID
UG901
Release Date
2023-06-09
Version
2023.1 English

Modelization of any asynchronous control logic (asynchronous set/reset) is done before the clock event statement.

Modelization of the synchronous logic (data, optional synchronous set/reset, optional clock enable) is done in the if branch of the clock event.

Table 1. Asynchronous Control Logic Modelization Summary
Modelization Type Contains Performed
Asynchronous control logic Asynchronous set/reset Before the clock event statement
Synchronous logic

Data

Optional synchronous set/reset

Optional clock enable

 In the clock event if branch.