Using HDL Language Templates - 2023.1 English

Vivado Design Suite User Guide: System-Level Design Entry (UG895)

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2023.1 English

The Vivado IDE provides templates for many Verilog, VHDL, and XDC structures, including AMD Parameterized Macros (XPMs) and library primitives. To view the templates:

  1. In the Vivado IDE Text Editor, select the Language Templates toolbar button.
  2. Select Tools > Language Templates.

    The Language Templates window appears with folders for Verilog, VHDL, SystemVerilog, XDC, and Debug.

    Figure 1. Language Templates Window