First-Level Tags in the Board File - 2023.1 English

Vivado Design Suite User Guide: System-Level Design Entry (UG895)

Document ID
UG895
Release Date
2023-05-16
Version
2023.1 English

The following table lists the first-level tags that can be nested under the <board> tag of schema version 2.1 of Board file:

Table 1. First-level Tags
Tag Usage/Description
<compatible_board_revisions> Lists all revisions of the board to which this board file applies. See Compatible Board Revisions for details.
<parameters> Parameters define features or properties of the board. See Parameters for details.
<jumpers> Defines jumpers found on the board. See Jumpers for details.
<components> Defines the various components present on the board. Components include FPGA devices, DDR, QSPI flash, FMC, etc. For more information, please refer Components.
<jtag_chains> Boards can have multiple JTAG chains. Each chain can include several components as detected by Vivado Hardware Tools. The <jtag_chains> tag identifies the position of each component in a JTAG chain. For more information, see JTAG Chains.
<connections> Describes connections between components ex: part0(FPGA) and LED. See Connections for details.
<ip_associated_rules> Limits the choices of available board interfaces for specific IP. See IP Associated Rules.