Elaborating the Design in Project Mode - 2023.1 English

Enabled RTL source files in the project are elaborated automatically during synthesis. You can also elaborate source files manually for constraint development and RTL netlist exploration. The Messages window shows the messages from elaboration and compilation. You can select the HDL language options used during elaboration in the Vivado IDE Project Settings. For information, see General Settings.

Elaboration results are not saved with the design. Every time you open the elaborated design, it is re-elaborated. However, you can save any constraints that were created in the elaborated design.

After design source files are imported into the project, use either of the following methods to elaborate and open the design:

• Select Flow > Open Elaborated Design.
• In the RTL Analysis section of the Flow Navigator, select Open Elaborated Design to load the elaborated netlist, the active constraint set, and the target device into memory.

To specify the design name to elaborate, use either of the following methods:

• Select Flow > Open Elaborated Design.
• In the Flow Navigator, select New Elaborated Design from the RTL Analysis right-click menu.

If there are out-of-context design modules, IP cores, block designs, DSP modules, in your design sources, the message appears when you open an elaborated design. The message indicates that the Link IP from OOC runs and Load constraints options from the Elaboration Settings dialog box might impact the performance of opening the elaborated design. You can disable these settings to speed elaboration. Refer to Elaboration Settings for more information.

Figure 1. Elaborate Design Message

When you open an elaborated design, the Vivado Design Suite automatically checks and compiles the RTL source files, generates the top schematic view, and displays the design in the default view layout.

Figure 2. Elaborated Design in the RTL Schematic Window

The Vivado IDE automatically identifies the top module for the design in most cases. In some cases, where there might be multiple candidates, the tool prompts you to choose the top module for the design. You can also manually define the top module by selecting Set as Top from the right-click menu in the Sources window.

Note: In the Hierarchy view of the Sources window, the top module icon identifies the current top module.