Creating an AXI4 Interface with 32-bit Address - 2023.1 English

By default, Vitis HLS implements the AXI4 port with a 64-bit address bus. However, some devices such as the Zynq 7000 have a 32 bit address bus. In this case you can implement the AXI4 interface with a 32-bit address bus by disabling the m_axi_addr64 interface configuration option as follows:

1. Select Solution > Solution Settings.
2. In the Solution Settings dialog box, click the General category, and Edit the existing config_interface command, or click Add to add one.
3. In the Edit or Add dialog box, select config_interface, and disable m_axi_addr64.