Reconfigurable Module Internal Clock Nets - 2023.1 English

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2023-05-24
Version
2023.1 English

In a reconfigurable module (RM) internal clock net, the clock root is placed at the center of the loads inside the reconfigurable partition (RP) Pblock. This clock root placement offers more flexibility for placement and routing of the RM internal clock in subsequent implementations. AMD recommends this approach whenever possible to achieve better skew and optimal clock root placement.