Versal Architecture AI Core Series Libraries Guide (UG1353) - 2023.1 English - Describes circuit design elements used in the Vivado™ Design Suite and associated with Versal™ Adaptive SoC devices with AI core. Element details include VHDL and Verilog instantiation code, schematic symbols, truth tables, and other information specific to the design element. - UG1353
- Document ID
- UG1353
- Release Date
- 2023-05-17
- Version
- 2023.1 English