The architecture-specific implementation of the Counter Extern closely follows the PSA/PNA specification (see References). It provides a mechanism for keeping statistics. The control plane can read the counter values. A P4 program cannot read counter values, only update them.
The Counter Extern supports 3 different counter types:
- PACKETS: increment values are set to 1.
- BYTES: increment values are set to the measured packet length as it appears on the AXI-stream I/F at the input to VitisNetP4 i.e. before any packet editing is performed. If, for example, FCS bytes are present in the packet, they will be included in the packet length increment value.
- PACKETS_AND_BYTES: the lower 35 bits are incremented by the packet length, the upper 29 bits are incremented by 1.
The counters supported are 64-bit counters. The highest number of counters supported per instance is 65,536, and there is no limit to the number of Counter Extern instances allowed. Each counter saturates at its maximum value.
The Counter Extern is only supported within the Match_Action Engine ‘control’ block of a P4 program.
The Counter Extern supports AXI4-Lite control-plane writes and reads (maximum burst size of 128 counters), with an optional clear-on-read. The Counter values are stored in BRAM or URAM, depending on the number of counters.
See Register Map in Chapter 4 for the Counter Extern register map of.
The Counter Extern is defined in xsa.p4 as -
extern Counter<W, S> {
Counter(bit<32> n_counters, CounterType_t type);
void count(in S index);
}An example of a Counter Extern being used in an example P4 program can be seen in the FiveTuple example design (see FiveTuple Example Design).