HLS simulation exclusively tests HLS code and is an integral part of the HLS
development process. The scope of this simulation is a single HLS kernel. Two
abstractions are supported, untimed and RTL (cycle-accurate). These two abstractions are
referred to as C simulation (Csim) and Co-simulation (Cosim), respectively. In the Csim
flow, the function to be synthesized should be validated with a test bench using C
simulation. A C test bench includes a main() top-level function, that
calls the function to be synthesized by the Vitis HLS
project. In the Cosim flow, the output of RTL code generated by the HLS compiler is
automatically compared against the output of the Csim result. The purpose of the Cosim
flow is to verify the functional correctness of the RTL and to validate performance in a
standalone context, independently of interactions with other functions.
HLS simulation is available through the Vitis unified software platform. For more information, see this link in the Vitis HLS User Guide (UG1399).