Address Offset | Width | Type | Reset Value | Description |
---|---|---|---|---|
0x41004 | 32 | RO | 0x0 | This register enables the VCU Decoder |
Field Name | Bits | Type | Reset Value | Definition |
---|---|---|---|---|
Reserved | [31:1] | RO | 0x0 | Reserved |
Decoder Enable | 0 | RO | 0x0 | 1 = Enable 0 = Disable |