Register Space - 2023.1 English

H.264/H.265 Video Codec Unit v1.2 Solutions LogiCORE IP Product Guide (PG252)

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2023.1 English

The Zynq UltraScale+ MPSoC VCU soft IP implements registers in the programmable logic. The following table summarizes the soft IP registers. These registers are accessible from the PS through the AXI4-Lite bus.

Note: For multi-stream use case, the registers in wmh1584685872692.html#wmh1584685872692__af318511 represent blended values that are input in GUI.