Programming Sequence of Synchronization IP - 2023.1 English

H.264/H.265 Video Codec Unit v1.2 Solutions LogiCORE IP Product Guide (PG252)

Document ID
PG252
Release Date
2023-05-16
Version
2023.1 English

The producer is V4L2 based application programs the buffer parameters to synchronization IP and give the early buffer done signal to consumer. Based on the signal, consumer perform a read transaction on the buffer and blocks on. The synchronization IP, block the consumer transactions until producer completes writing a slice data to the memory.

  • Open the synchronization device using device name /dev/xlnxsync0.
  • Get the IP capabilities and status using xvfbsync_syncip_chan_populate(). The capabilities are maximum number of channels, maximum number of users, and reserved channel.
  • Initialize encoder sync IP channel using xvfbsync_enc_sync_chan_populate().
  • Enable the channel using xvfbsync_enc_sync_chan_enable().
  • Set the Sync IP interrupt mask using xvfbsync_enc_sync_chan_set_intr_mask(). This disables the masked interrupts.
  • The buffer is programmed using xvfbsync_enc_sync_chan_add_buffer(). The parameter should contain channel ID, dma buffer descriptor, luma start and end addresses, and chroma start and end addresses. The buffer addresses should be programmed for both producer and consumer Luma end offset is calculated based on Luma size, pitch, and actual width of the buffer. The calculation, as shown below, is similar for Chroma end offset too.

    Luma end offset = Luma start pointer + Luma size + pitch - actual luma width - 1

    Chroma end offset = Chroma start pointer + Chroma size + pitch - actual chroma width - 1

    Table 1. Calculating Offsets
    Color Format Luma start Address Luma End Offset Chroma Start Offset Chroma End Offset
    YUV 420 8-bit 1080p Luma start pointer 1920x1080 + 1920 - 1920 - 1 Chroma start pointer 1920x540 + 1920 - 1920 - 1
    YUV 422 10-bit 4k Luma start pointer 5120x2176 + 2176 - 2176 - 1 Chroma start pointer 5120x2176 + 5120 - 5120 - 1
  • The application register for POLLPRI errors. Using all the above steps, the Sync IP gets configured with buffer address details and does the synchronization by making sure that consumer requests for the particular buffer get unblocked only when producer has written sufficient data. If any error occurs on running pipeline then Sync IP driver will mask corresponding interrupt bit and unblocks the poll thread with error event so that application will get the channel error status, once the particular error gets resolve or obsolete then application should unmask the Sync IP interrupt by using xvfbsync_syncip_reset_err_status().
  • After completion of the use case, the application should reset the syncip context and de-initialize the syncip channel by using xvfbsync_enc_sync_chan_depopulate(). This will disable the particular Sync IP channel and do necessary cleanup of resources.