The AXI specification is available at http://www.arm.com/products/system-ip/amba/amba-open-specifications.php.
Table 1. Controller AXI Write PortX Interface
| Signal |
Direction |
Description |
| Write
Address Channel |
| s_axi_ctrl_awaddrX [11:0] |
Input |
Byte address |
| s_axi_ctrl_awvalidX |
Input |
|
| s_axi_ctrl_awreadyX |
Output |
|
| s_axi_ctrl_awprotX[2:0] |
Input |
|
| Write
Data Channel |
| s_axi_ctrl_wdataX [31:0] |
Input |
|
| s_axi_ctrl_wstrbX [3:0] |
Input |
Write data |
| s_axi_ctrl_wvalidX |
Input |
Byte enable |
| s_axi_ctrl_wreadyX |
Output |
|
| Write
Response Channel |
| s_axi_ctrl_brespX[1:0] |
Output |
Tied to zero (OKAY) |
| s_axi_ctrl_bvalidX |
Output |
|
| s_axi_ctrl_breadyX |
Input |
|
Table 2. Controller AXI Read PortX Interface
| Signal |
Direction |
Description |
| Read
Address Channel |
| s_axi_ctrl_arprotX[2:0] |
Input |
|
| s_axi_ctrl_araddrX [11:0] |
Input |
Byte address |
| s_axi_ctrl_arvalidX |
Input |
|
| s_axi_ctrl_arreadyX |
Output |
|
| Read
Data Channel |
| s_axi__ctrl_rdataX[31:0] |
Output |
Read data |
| s_axi__ctrl_rrespX[1:0] |
Output |
Tied to zero (OKAY) |
| s_axi__ctrl_rvalidX |
Output |
|
| s_axi__ctrl_rreadyX |
Input |
|