This section provides detailed descriptions of the XilFPGA library APIs.
XilFPGA error = Lower-level errors + Interface-specific errors + XilFPGA top-layer errors
| Lower-level Errors (other libraries or drivers used by XilFPGA) | Interface-specific Errors (PCAP Interface) | XilFPGA Top-layer Errors |
|---|---|---|
| 31 - 16 bits | 15 - 8 bits | 7 - 0 bits |
XilFPGA Top Layer
The functionality exist in this layers is completely interface agnostic. It provides a unique interface to load the Bitstream across multiple platforms.
Interface Specific Layer
This layer is responsible for providing the interface-specific errors. In case of Zynq UltraScale+ MPSoC, it provides the errors related to PCAP interface.
XilFPGA Lower Layer
This layer is responsible for providing the error related to the lower level drivers used by interface layer.