| XIpiPsu * |
IpiInst |
Pointer to IPI driver instance
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XSemIpiResp
* |
Resp |
Structure Pointer of IPI response
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Resp->RespMsg1: Acknowledgment ID of get Cfr status(0x1030D)
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Resp->RespMsg2: SLR Index in which the command is executed
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| u32 |
TargetSlr |
Target SLR index on which command is to be executed
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0x0 : Target is master only
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0x1 : Target is slave 0 only
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0x2 : Target is slave 1 only
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0x3 : Target is slave 2 only
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XSemStatus
* |
StatusInfo |
Structure Pointer with SEM Status details
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StatusInfo->NpiStatus: Provides details about NPI scan
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Bit [31]: 0 - No error, SHA-3 engine is present 1 - Cryptographic acceleration blocks are disabled for export compliance. No support for NPI scan, an event will be sent to R5
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Bit [30]: 0 - NPI scan is running for scheduled interval 1 - Indicates NPI scan failed to run on scheduled interval. If NPI scan is not executed as per the configured periodicity, the error will notified to R5 user. The scan will continue to run
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Bit [29]: 0- No descriptor missed during scanning 1- Indicates NPI scan failed to scan all descriptors completely (excluding arbitration failures). This will be notified to R5 user and the scan will continue to run.
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Bit [28]: 0 - NPI scan executing within budget time 1 - Indicates NPI scan has exceeded maximum budget execution time of 20ms. This will be notified to R5 user and the scan will continue to run.
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Bit [27]: 0 - No error in SLR to SLR communication 1 - Indicates failure in SSIT internal communication channel This bit is applicable for SSIT devices.
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Bit [26]: Reserved
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Bit [25]: 0 - No error in PMC_PL_GPO 1 - Indicates GPO Initialization or write failed. This is HW failure. In this condition, the scan will be stopped, and notification will be sent to R5
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Bit [24]: 0 - No error SHA-3 engine 1 - Indicates SHA engine failed to function during initialization or start or DMA transfer. This is HW failure. In this condition, the scan will be stopped, and notification will be sent to R5
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Bit [23]: 0 - No error in register writes 1 - Indicates the register write and read back failure occurred during the scan. This is HW failure. In this condition, the scan will be stopped, and notification will be sent to R5
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Bit [22]: Reserved
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Bit [21]: 0 - No error in DDR calibration 1 - Indicates NPI DDRMC Main Slave Arbitration Timeout occurred during the scan. If the DDRMC calibration is not done, the descriptor will be skipped and scan will continue to run for next descriptor
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Bit [20]: 0 - No error in descriptor format 1 - Indicates NPI Descriptor has invalid format. This failure indicates that there is some corruption in the XilSEM NPI descriptor data. The scan will be stopped, and notification will be sent to R5
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Bit [19]: 0 - No error in NPI Descriptor SHA header 1 - Indicates NPI Descriptor SHA Header mismatch occurred during the scan. This failure indicates that there is some corruption in the XilSEM NPI descriptor data. The scan will be stopped, and notification will be sent to R5
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Bit [18]: 0 - NPI descriptors are present in the memory 1 - Indicates the absence of NPI Descriptor (Zero descriptors) This failure indicates that there is some corruption in the XilSEM NPI descriptor data. The scan will be stopped, and notification will be sent to R5
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Bit [17]: 0 - No error in SHA comparison during run time 1- Indicates SHA comparison failure occurred during run time. This failure indicates that there is some bit flip in the NPI registers. The scan will be stopped and an event will be sent to R5
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Bit [16]: 0 - No error in SHA comparison during first scan 1- Indicates SHA comparison failure occurred during initialization. This failure indicates that there is some bit flip in the NPI registers. The scan will be stopped and an event will be sent to R5
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Bit [15-12]: Reserved
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Bit [11]: 0 - NPI scan task is not added to PLM Scheduler to run periodically 1 - NPI scan task is added to PLM Scheduler to run periodically This bit is for NPI scan state information.
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Bit [10]: NPI scan is suspended 0 - NPI scan is not suspended 1 - NPI scan is suspended due to errors This bit is for NPI scan state information.
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Bit [09]: 0 - NPI scan initialization is not done 1 - NPI scan initialization is done This bit is for NPI scan state information.
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Bit [08]: 0 - NPI scan is present in the design 1 - NPI scan disabled in the design This bit is for NPI scan state information.
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Bit [07-06]: Reserved
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Bit [05]: 0 - No internal error 1 - NPI scan is in error state (due to timeouts, invalid descriptors) This bit is for NPI scan state information.
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Bit [04]: 0 - No error in NPI Scan 1 - NPI scan in SHA comparison mismatch error state. This bit is for NPI scan state information.
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Bit [03]: 0 - NPI scan is not in SHA error inject state 1 - NPI scan is in SHA error inject state. This bit is for NPI scan state information.
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Bit [02]: 0 - NPI scan is not in scan state 1 - NPI scan is in scan state. This bit is for NPI scan state information.
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Bit [01]: 0 - NPI scan is not in initialization state 1 - NPI scan is in initialization state This bit is for NPI scan state information.
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Bit [00]: 0 - NPI scan is not in idle state 1 - NPI scan is in idle state This bit is for NPI scan state information.
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StatusInfo->SlvSkipCnt: Provides NPI descriptor slave skip counter value if arbitration failure. This is 8 words result to accommodate 32 1-Byte skip counters for individual slaves arbitration failures. Slaves can be DDRMC Main, GT for which arbitration is required before performing scanning.
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StatusInfo->ScanCnt: NPI scan counter value. This counter represents number of periodic scan cycle completion.
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StatusInfo->HbCnt: NPI heart beat counter value. This counter represents number of scanned descriptor slaves.
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StatusInfo->ErrInfo: NPI scan error information if SHA mismatch is detected. This is 2 word information.
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Word 0: Node ID of descriptor for which SHA mismatch is detected
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Word 1 Bit [15-8]: NPI descriptor index number
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Word 1 Bit [7-0]: NPI Slave Skip count Index
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StatusInfo->CramStatus: Provides details about CRAM scan
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Bit [31-25]: Reserved
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Bit [24:20]: CRAM Error codes
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00001: Unexpected CRC error when CRAM is not in observation state
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00010: Unexpected ECC error when CRAM is not in Observation or Initialization state
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00011: Safety write error in SEU handler
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00100: ECC/CRC ISR not found in any Row
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00101: CRAM Initialization is not done
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00110: CRAM Start Scan failure
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00111: CRAM Stop Scan failure
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01000: Invalid Row for Error Injection
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01001: Invalid QWord for Error Injection
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01010: Invalid Bit for Error Injection
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01011: Invalid Frame Address for Error Injection
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01100: Unexpected Bit flip during Error Injection
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01101: Masked Bit during Injection
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01110: Invalid Block Type for Error Injection
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01111: CRC or Uncorrectable Error or correctable error(when correction is disabled) is active in CRAM
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10000: ECC or CRC Error detected during CRAM Calibration in case of SWECC
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Bit [19-18]: Reserved
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Bit [17]: 0: CRAM scan is enabled in design 1: CRAM scan is disabled in design
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Bit [16]: 0: CRAM scan is not initialized 1: CRAM Initialization is completed This bit is for CRAM scan state
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Bit [15-14]: CRAM Correctable ECC error status
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00: No Correctable error encountered
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01: Correctable error detected and corrected
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10: Correctable error detected but not corrected (Correction is disabled)
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11: Reserved
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Bit [13]: 0: No error in CRAM scan 1: CRAM scan has internal error (Null pointer access/Safety write error) In this error condition, scan will be stopped and an event will be sent to R5.
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Bit [12]: 0: No error in error decoding 1: Invalid Error Location is reported In this error condition, scan will be stopped and an event will be sent to R5.
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Bit [11]: 0: No correctable error detected 1: Correctable ECC error detected In this condition, an event will be sent to R5. If correection is disabled, then scan will be stopped. Else, scan will continue to run.
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Bit [10]: 0: No CRC error 1: CRC error is detected by CRAM. In this error condition, scan will be stopped and an event will be sent to R5.
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Bit [09]: 0: No uncorrectable error 1: Uncorrectable ECC error is detected In this error condition, scan will be stopped and an event will be sent to R5.
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Bit [08]: 0: No error in CRAM scan start-up test 1: CRAM start-up test failure In this error condition, scan will be stopped.
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Bit [07]: 0: No error during CRAM calibration` 1: CRAM Calibration Timeout error In this error condition, scan will be stopped and an event will be sent to R5.
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Bit [06]: 0: CRAM scan is not in the fatal state 1: CRAM scan is in the fatal state This bit is for CRAM scan state.
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Bit [05]: 0: CRAM scan is not in the error injection state 1: CRAM scan is in the error injection state This bit is for CRAM scan state.
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Bit [04]: 0: CRAM scan is not in the idle state 1: CRAM scan is in the idle state This bit is for CRAM scan state.
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Bit [03]: 0: CRAM scan is not in the correction state 1: CRAM scan is in the correction state This bit is for CRAM scan state.
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Bit [02]: 0: CRAM scan is not in the observation state 1: CRAM scan is in the observation state This bit is for CRAM scan state.
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Bit [01]: 0: CRAM scan is not in the Initialization state 1: CRAM scan is in the Initialization state This bit is for CRAM scan state.
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Bit [00]: CRAM Scan is included in design This bit is for CRAM scan state.
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StatusInfo->ErrAddrL: This stores the low address of the last 7 corrected error details if correction is enabled in design.
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Bit [31:28]: Reserved
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Bit [27:23]: QWord location where error was detected
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Bit [22:16]: Bit location where error was detected
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Bit [15:2]: Reserved
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Bit [1:0]: Define validity of error address.
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00: Info not available
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01: Address out of range
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10: Reserved
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11: Address valid
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StatusInfo->ErrAddrH: This stores the high address of the last 7 corrected error details if correction is enabled in design.
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Bits[31:27]: Reserved
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Bits[26:23]: Row number where error was detected
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Bits[22:20]: Block type of the frame
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Bits[19:0]: Frame address where error was detected
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StatusInfo->ErrCorCnt: Counter value of Correctable Error Bits
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