XFpga_BitStream_Load - 2023.1 English

Standalone Library Documentation: BSP and Libraries Document Collection (UG643)
Document ID
UG643
Release Date
2023-05-16
Version
2023.1 English

The API is used to load the bitstream file into the PL region.

It supports AMD Vivado™ Design Suite generated bitstream (*.bit, *.bin) and Bootgen-generated bitstream (*.bin) loading, Passing valid bitstream size (Size) information is mandatory for Vivado Design Suite generated bitstream, For Bootgen-generated bitstreams bitstream size is taken from the bitstream header.

Prototype

u32 XFpga_BitStream_Load(XFpga *InstancePtr, UINTPTR BitstreamImageAddr, UINTPTR KeyAddr, u32 Size, u32 Flags);

Parameters

The following table lists the XFpga_BitStream_Load function arguments.

Table 1. XFpga_BitStream_Load Arguments
Type Name Description
XFpga * InstancePtr Pointer to the XFpga structure.
UINTPTR BitstreamImageAddr Linear memory bitstream image base address
UINTPTR KeyAddr AES key address which is used for decryption.
u32 Size Used to store size of bitstream image.
u32 Flags Flags are used to specify the type of bitstream file.
  • BIT(0) - Bitstream type
    • 0 - Full bitstream
    • 1 - Partial bitstream
  • BIT(1) - Authentication using DDR
    • 1 - Enable
    • 0 - Disable
  • BIT(2) - Authentication using OCM
    • 1 - Enable
    • 0 - Disable
  • BIT(3) - User-key Encryption
    • 1 - Enable
    • 0 - Disable
  • BIT(4) - Device-key Encryption
    • 1 - Enable
    • 0 - Disable

Returns

  • XFPGA_SUCCESS on success
  • Error code on failure.
  • XFPGA_VALIDATE_ERROR.
  • XFPGA_PRE_CONFIG_ERROR.
  • XFPGA_WRITE_BITSTREAM_ERROR.
  • XFPGA_POST_CONFIG_ERROR.