#Define Xil_L2CacheInvalidateRange - 2023.1 English

Standalone Library Documentation: BSP and Libraries Document Collection (UG643)
Document ID
UG643
Release Date
2023-05-16
Version
2023.1 English

Description

Invalidate the L1 data cache for the given address range.

If the bytes specified by the address (Addr) are cached by the L1 data cache, the cacheline containing that byte is invalidated. If the cacheline is modified (dirty), the modified contents are lost.

Note: Processor must be in real mode.

Parameters

The following table lists the Xil_L2CacheInvalidateRange function arguments.

Table 1. Xil_L2CacheInvalidateRange Arguments
Name Description
Addr Address of range to be invalidated.
Len Length in bytes to be invalidated.