#Define Xil_L2CacheFlushRange - 2023.1 English

Standalone Library Documentation: BSP and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2023-05-16
Version
2023.1 English

Description

Flush the L2 data cache for the given address range.

If the bytes specified by the address (Addr) are cached by the data cache, and is modified (dirty), the cacheline will be written to system memory. The cacheline will also be invalidated.

Parameters

The following table lists the Xil_L2CacheFlushRange function arguments.

Table 1. Xil_L2CacheFlushRange Arguments
Name Description
Addr the starting address of the range to be flushed.
Len length in byte to be flushed.