YUYV2NV21: - 2023.1 English

Vitis Libraries

Release Date
2023-12-20
Version
2023.1 English
template<int SRC_T,int Y_T,int UV_T,int ROWS,int COLS,int NPC=1,int NPC_UV=1, int XFCVDEPTH_IN_0 = _XFCVDEPTH_DEFAULT, int XFCVDEPTH_IN_1 = _XFCVDEPTH_DEFAULT, int XFCVDEPTH_IN_2 = _XFCVDEPTH_DEFAULT>void yuyv2nv21(xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_IN_0> & _src,xf::cv::Mat<Y_T, ROWS, COLS, NPC, XFCVDEPTH_IN_1> & _y_image,xf::cv::Mat<UV_T, ROWS/2, COLS/2, NPC_UV, XFCVDEPTH_IN_2> & _uv_image)

Parameter Descriptions

The following table describes the template and the function parameters.

Table 441 Table Parameter Description
Parameter Description
SRC_T Input pixel type. Only 16-bit, unsigned,1-channel is supported (XF_16UC1).
Y_T Output Y image pixel type. Only 8-bit, unsigned, 1-channel is supported (XF_8UC1).
UV_T Output UV image pixel type. Only 8-bit, unsigned, 2-channel is supported (XF_8UC2).
ROWS Maximum height of input and output image.
COLS Maximum width of input and output image. Must be multiple of NPC.
NPC Number of pixels to be processed per cycle; Possible options are XF_NPPC1,XF_NPPC2,XF_NPPC4 and XF_NPPC8.
NPC_UV Number of U, V Pixels to be processed per cycle; Possible options are XF_NPPC1,XF_NPPC2 and XF_NPPC4.
XFCVDEPTH_IN_0 Depth of input image
XFCVDEPTH_IN_1 Depth of input image
XFCVDEPTH_IN_2 Depth of input image
_src Input image
_y_image Y Output image
_uv_image UV Output image

Resource Utilization

The following table summarizes the resource utilization of UYVY/YUYV to NV21 function in Normal mode (1 pixel), as generated in the Vivado HLS 2019.1 tool for the Xilinx xczu9eg-ffvb1156-2-i-es2 FPGA to process a HD (1080x1920) image.

Operating Mode Operating Frequency (MHz) Utilization Estimate
BRAM_18K DSP_48Es FF LUT CLB
1 Pixel 300 0 0 215 73 42

Performance Estimate

The following table summarizes the performance of the kernel in single pixel configuration as generated using Vivado HLS 2019.1 tool for the Xilinx xczu9eg-ffvb1156-2-i-es2 FPGA to process a HD (1080x1920) image.

Table 442 Table Performance Estimate Summary
Operating Mode Latency Estimate
Max Latency (ms)
1 pixel operation (300 MHz) 6.9