Internals of streamToAxi - 2023.1 English

Vitis Libraries

Release Date
2023-12-20
Version
2023.1 English

This document describes the structure and execution of streamToAxi, implemented as streamToAxi function.

This function is designed for writing data into AXI master in burst mode.

bit field

Figure 68 stream to axi workflow

Caution

Applicable conditions:

  1. AXI port width should be multiple of stream width.
  2. countForBurst: convert stream width from _WStrm to _WAxi and count burst number.
  3. burstWrite: It reads the number of burst from stream, then burst write to axi port in dataflow.

This primitive performs streamToAxi in two modules working simultaneously.

The implementation of the two modules is shown as follows,

bit field

Figure 69 countForBurst imprementation details

where N = _WAxi/_WStrm , not enough one axi is the state of counter_for_axi < N and it would be instead of 0. not enough one burst is the state of counter_for_burst < NBurst and it would be as a burst to write.

This streamToAxi primitive has only one port for axi ptr and one port for stream output.