The detail algorithm implemention is illustrated as below:
As it is shown in the aboved pictures, the entire SVPWM_DUTY have five configurable parameters.
- phase_shift: flag “[-shift_0/-shift_120]”. It determines whether the input voltage streams have phase shift.
- dclink_source: flag “[-dc_adc/-dc_ref]”. This flag register determines the dclink voltage source.
- pwm_freq: flag “[-pwm_fq <pwm frequency>]”. This flag register provides a configurable entry for the pwm wave frequency. The pwm wave frequency is also the throughput at the output end.
- dead_cycles: flag “[-dead <dead cycles>]”. The dead_cycles determines the transit time between the switch on/off. The switches pair shall not simultaneously be switching on and off, in terms of the danger of overloaded transient currents on the bridge. It may incur the systematic turbulence and cause serious problem. The default value of dead_cycles is 10.
- sampling ii: flag “[-ii <sampling II>]”. The ii (iteration interval) determines the sampling rate of the input. The default value is 1.