Package the RTL Kernel - 2023.1 English

Vitis Tutorials: Hardware Acceleration (XD099)

Document ID
XD099
Release Date
2023-08-02
Version
2023.1 English

After you confirm the design is OK, select Generate RTL Kernel from Flow Menu, then select Sources-only kernel in the pop-up window, click OK button to finish the rtc_gen RTL kernel creation.


The generated kernel file is ./rtc_gen/vivado_project/rtc_gen_ex/rtc_gen.xo, which can be used in downstream Vitis intergartion flow. From the Vivado Tcl Console view, you can see the Vivado actually use following command line to finish the kernel packaging:

package_xo  -xo_path ./rtc_gen/vivado_project/rtc_gen_ex/exports/rtc_gen.xo \
            -kernel_name rtc_gen \
            -ip_directory ./rtc_gen/vivado_project/rtc_gen_ex/rtc_gen \
            -kernel_xml ./rtc_gen/vivado_project/rtc_gen_ex/imports/kernel.xml

./rtc_gen/vivado_project/rtc_gen_ex/rtc_gen is the folder for rtc_gen IP, and ./rtc_gen/vivado_project/rtc_gen_ex/imports/kernel.xml is the kernel description file. So we could copy out these items to standlone directory and just use the command line above to package the kernel. This is also where the ./hw/rtc_gen_ip directory and ./hw/rtc_gen_kernel.xml file come from.

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