Module 2 - 2023.1 English

Vitis Tutorials: Hardware Acceleration (XD099)

Document ID
Release Date
2023.1 English

Code, files, and instructions for module 2 (same instructions as in Module 1 to set up and run the Vitis tools).

In this module…

  1. Pipeline for throughput.

  2. General description of PIPELINE.

  3. Introduction to the INTERFACE pragma.

This module is meant to focus on the pipeline pragma, and go through the following description. The kernel source code with the loops annotated with the pragma will produce the same results as in Module 1; that is because since simple loops and inner loops (for nested loops) are automatically pipelined by the tool. This version also adds the INTERFACE pragma to explicitely describe the connectivity and settings for the C ports of the kernel.