Introduction and Performance Estimation - 2023.1 English

Vitis Tutorials: Hardware Acceleration (XD099)

Document ID
XD099
Release Date
2023-08-02
Version
2023.1 English

This lab will explore a 2D video convolution filter, and measure its performance on the host machine. These measurements will establish a performance baseline. The amount of acceleration that should be provided by hardware implementation is calculated based on the required performance constraints. In the next lab, you will estimate the performance of the FPGA accelerator. In a nutshell, during this lab, you will:

  • Learn about video convolution filters

  • Measure the performance of a software implemented convolution filter

  • Calculate the required acceleration versus the software implementation for given performance constraints

  • Estimate the performance of the hardware accelerator before implementation