Build the Project - 2023.1 English

Vitis Tutorials: Hardware Acceleration (XD099)

Document ID
XD099
Release Date
2023-08-02
Version
2023.1 English

With the host application code (host.cpp) and the RTL kernel code (Vadd_A_B.xo) added to the project, you are ready to build and run the project.

  1. In the Hardware Kernel Project Settings view select the Active build Configuration: and set it to Hardware Emulation. The Hardware Emulation target is useful for:

    • Verifying the functionality of the logic that will go into the FPGA.

    • Retrieving the initial performance estimates of the accelerator and host application.

    NOTE: The RTL kernel does not support software emulation.

    IMPORTANT: You can add a C-model for software emulation to XRT-managed kernels as explained at Adding C-Models to RTL Kernels. However, this is not supported for user-managed kernels.

  2. In the Assistant view, select the top-level system project kernelTest_system and click the Build command Build Command to build the active Emulation-HW build configuration.

    The different elements of the Vitis application project are built: the processor code (host.cpp), the HW link project to link the RTL kernel (.xo) to the target platform, and the top-level system project to package the design.

    TIP: Because the RTL kernel is imported as an .xo file, the kernel does not need to be compiled.

  3. In the Assistant view, select the Run button, and select Run Configurations.

  4. Select the System Project Debug configuration and click the New launch configuration command Launch Config to create a new configuration for the run.

    The SystemDebugger_kernelTest_system configuration is created.

    The host program takes the xclbin file as an input argument, which you must provide in the Program Arguments list.

  5. Select Edit next to Program Arguments.

    The Vitis IDE can automatically search and include the xclbin file when the Automatically update arguments is enabled.

  6. Click OK to add the arguments.

  7. In the Run Configurations dialog box click Apply and then click Run to run the configuration, and then verify the results.

The Console window in the Vitis IDE displays TEST PASSED. You have built and run the application using your user-managed RTL kernel.