Application Overview - 2023.1 English

Vitis Tutorials: Hardware Acceleration (XD099)

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2023.1 English

This tutorial uses a simple example of vector addition with DDR based implementation. Ports in1 and in2 are reading from DDR banks 0 and 1, respectively, and port out is writing the results in DDR bank 2. The tutorial will walk through the necessary changes to the existing application to migrate to HBM.