1: Create the Vivado project and add design sources - 2023.1 English

Vitis Tutorials: Hardware Acceleration (XD099)

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2023.1 English

First, you must create a Vivado project containing the source files. The script use the Tcl commands create_project, add_files and update_compiler_order to finish this step. For krnl_cbc, only RTL source code files are required to be added to the newly created project.

Next, the ipx::package_project Tcl command is used to initialize the IP packaging process, as follows:

create_project krnl_cbc ./krnl_cbc
add_files -norecurse {
      ../rtl/axi_master_counter.sv       \
      ../rtl/axi_read_master.sv          \
      ... ...
update_compile_order -fileset sources_1
ipx::package_project -root_dir ./krnl_cbc_ip -vendor xilinx.com -library user -taxonomy /UserIP -import_files -set_current true