Vivado® integrated design environment supports Universal Verification Methodology (UVM) in Vivado simulator (XSIM). UVM version 1.2 is pre-compiled and shipped with Vivado.
Through this tutorial, let's take an UVM based example and run it in Vivado Simulator.
Note: Go to directory
ug937-vivado-design-suite-tutorial-design-files/ug937-design-files/uvm
of tutorial which was downloaded at the start of Lab 1: Running the Simulator in Vivado IDE.