Lab 1: Running the Simulator in Vivado IDE - 2022.2 English

Vivado Design Suite Tutorial: Logic Simulation (UG937)

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2022.2 English

In this lab, you create a new Vivado® Design Suite project, add HDL design sources, add IP from the Xilinx® IP catalog, and generate IP outputs needed for simulation. Then you run a behavioral simulation on an elaborated RTL design.