TimeGROUP - 2022.2 English - UG911

ISE to Vivado Design Suite Migration Guide (UG911)

Document ID
UG911
Release Date
2022-10-19
Version
2022.2 English

You can use Tcl variables with timing exceptions to accomplish the same effect as an INST/TNM and a TIMESPEC. The following example illustrates the point.

UCF Example:

INST "DUT/BLOCK_A/data_reg[*]” TNM = "from_data_reg_0";

INST "DUT/BLOCK_A/addr_reg[*]” TNM = "from_data_reg_0";

INST "DUT/BLOCK_B/data_sync[*]” TNM = "to_data_reg_0";

INST "DUT/BLOCK_B/addr_sync[*]” TNM = "to_data_reg_0";

TIMESPEC "TS_MCP" = FROM "from_data_reg_0" TO "to_data_reg_0" TS_FSCLK * 3;

Tcl Equivalent:

set from_data_reg_0 [get_cells {DUT/BLOCK_A/data_reg[*]\ DUT/BLOCK_A/addr_reg[*]}];

set to_data_reg_0 [get_cells {DUT/BLOCK_B/data_sync[*]\ DUT/BLOCK_B/addr_sync[*]}];

set_multicycle_path -setup 3 -from $from_data_reg_0 -to $to_data_reg_0;

set_multicycle_path -hold 2 -from $from_data_reg_0 -to $to_data_reg_0;