1.
Open the MHS file, and for each AXI Master set the
Enable Register Slice/Enable Data FIFO
based upon searching the MHS in
Table: AXI Master Interconnect Settings with MicroBlaze Devices
.
When doing the search, replace
<intf_name>
with the associated
BUS_INTERFACE
name. For example,
<intf_name>
for
BUS_INTERFACE M_AXI_MM2S
would be
M_AXI_MM2S
.
TIP:
AXI Masters connect to the AXI Interconnect Slave connection. You can make the selection in the Slave Interfaces tab.
Table 5-7:
AXI Master Interconnect Settings with MicroBlaze Devices
|
Parameter
|
Exists
|
Does Not Exist
|
|
C_INTERCONNECT_<intf_name>_AR_REGISTER
C_INTERCONNECT_<intf_name>_R_REGISTER
C_INTERCONNECT_<intf_name>_AW_REGISTER
C_INTERCONNECT_<intf_name>_W_REGISTER
C_INTERCONNECT_<intf_name>_B_REGISTER
|
SXX_AXI
: Enable Register Slice
Auto
|
SXX_AXI
: Enable Register Slice
None
|
|
C_INTERCONNECT_<intf_name>_WRITE_FIFO_DEPTH
C_INTERCONNECT_<intf_name>_READ_FIFO_DEPTH
|
Parameter = 32
SXX_AXI
: Enable Data FIFO
32 deep
Parameter = 512
SXX_AXI:
Enable Data FIFO
512 deep
|
SXX_AXI
: Enable Data FIFO
None
|