By default, nets in the static region of a DFX design can use any routing
resources in the device. However, this might cause the static nets to bleed over to the
dynamic region. Although allowed from a functional perspective, this approach reduces
the solution space of the router for reconfigurable modules (RMs) inside the
reconfigurable partition (RP) Pblock. After the first implementation is complete and
static routes and placement are locked using the lock_design command,
the static nets are locked with some of the nets in the RP Pblock. During subsequent
child implementations, the DFX flow identifies these locked static nets during RM
implementation and attempts to perform place and route in a reduced solution space to
avoid unroutability. To avoid the bleed over of static nets to RP Pblocks, Xilinx recommends containing the static nets inside a static Pblock by
setting the CONTAIN_ROUTING TRUE constraint.
In the following example, the static region Pblock does not have the CONTAIN_ROUTING constraint enabled. The bleed over from the static nets the to RP Pblock is highlighted in yellow. This approach is not recommended, because it negatively impacts routability during RM compile.
In the following example, the CONTAIN_ROUTING constraint is enabled on the static Pblock, and there is no bleed over of static nets to the RP Pblock. This is the recommended approach for improved routability during RM compile.
