Expanded Routing - 2022.2 English

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

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2022.2 English

Similar to UltraScale+ architecture, the expansion of routing area also happens in Versal for logical signals. The routing footprint of a reconfigurable Pblock can be understood by sourcing the script called <pblock_name>_routing_tiles.tcl in hd_visual folder of implementation directory. For clock routing, the necessary clock routing tiles (for example, CLK_VNOC) of RP Pblock are automatically pulled into the routing footprint. See Expansion of CONTAIN_ROUTING Area for more information.

Warning: The Expanded Routing feature should not be disabled for Versal devices to ensure the highest possibility of routing success.