VHDL Predefined Standard Packages - VHDL Predefined Standard Packages - 2022.2 English

VHDL Predefined Standard Packages - VHDL Predefined Standard Packages - 2022.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID

UG901

Release Date

2022-11-16

Version

2022.2 English

VHDL predefined standard packages that are by default included, define the following basic VHDL types: bit , bit_vector , integer , natural , real , and boolean .