Use VHDL functions and procedures for blocks that are used multiple times in a design. The content is similar to combinatorial process content
Declare functions and procedures in:
• The declarative part of an entity
• An architecture
• A package
A function or procedure consists of a declarative part and a body.
The declarative part specifies:
• input parameters, which can be unconstrained to a given bound.
• output and inout parameters (procedures only)
IMPORTANT: Resolution functions are not supported except the function defined in the IEEE std_logic_1164 package.