VHDL Example on Architecture - VHDL Example on Architecture - 2022.2 English

VHDL Example on Architecture - VHDL Example on Architecture - 2022.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID

UG901

Release Date

2022-11-16

Version

2022.2 English

architecture rtl of test is

attribute dont_touch : string;

attribute dont_touch of rtl : architecture is "yes";