TRANSLATE_OFF/TRANSLATE_ON Example (VHDL) - TRANSLATE_OFF/TRANSLATE_ON Example (VHDL) - 2022.2 English

TRANSLATE_OFF/TRANSLATE_ON Example (VHDL) - TRANSLATE_OFF/TRANSLATE_ON Example (VHDL) - 2022.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID

UG901

Release Date

2022-11-16

Version

2022.2 English

-- synthesis translate_off

Code...

-- synthesis translate_on

-- synthesis on

Code....

-- synthesis off

CAUTION! Be careful with the types of code that are included between the translate statements. If it is code that affects the behavior of the design, a simulator could use that code, and create a simulation mismatch.