Sequential Process Using a Wait Statement Coding Example (VHDL) - Sequential Process Using a Wait Statement Coding Example (VHDL) - 2022.2 English - UG901
Vivado Design Suite User Guide: Synthesis (UG901)
Document ID
UG901
Release Date
2022-11-16
Version
2022.2 English
process begin
wait until rising_edge(clk);
q <= d;
end process;