RAM_DECOMP Example (VHDL) - RAM_DECOMP Example (VHDL) - 2022.2 English - UG901
Vivado Design Suite User Guide: Synthesis (UG901)
Document ID
UG901
Release Date
2022-11-16
Version
2022.2 English
attribute ram_decomp : string;
attribute ram_decomp of myram : signal is "power";